The higher the frequency you measure, the greater the accuracy at detecting a error. A tiny error at 7 MHz will take a lot of seconds of counting before you detect an error accurately, at 200MHz you can see it 28.5X times sooner. Specially in the beginning the oscillator will be drifting the most and if you need some huge number of seconds before you can detect an error then you will not be correcting the initial errors too well.

Piping the output of the DDS around has other problems, that signal is on the band or a even multiple of the signals you are listening to, you end up with more chances with leakage of a signal that will feed back into the input.

If you are going to go through a lot of effort you might as well go for maximum accuracy.

At 09:51 PM 1/1/2006, you wrote:
Tom
 
Your suggestion will most definitely be implemented in any design. It really is the only way to go if we are to use GPS and want to have really high accuracy. If we are going to spend the money on a solution, then we might as well make it as good as it gets with these tools. They really are not all that expensive.  Also want to make it generic enough that it will provide the very accurate 10 mhz in a ‘stand alone’ mode as the SDR and other targets require. I REALLY liked your PIC solution for the divider chain. That really is not all that expensive, and can keep the long term averages, as well as yield the divisors, if they are needed. The nice thing about our Xylo (FPGA) solution for the SDR is that we have it under ‘software’ control on both the clock side, the reference side, and the PowerSDR side.
 
I think I have asked this question before and perhaps Jim Lux answered:
 
Can we just count for one second and roll the carry out to the bit bucket, say at 12 or 16 bits. The low order byte or bytes should be accurate enough for averaging the phase, where we are pretty accurate on the 1 second count in the first place? The high order bits will probably be the same every count in any case.
 
Bill – KD5TFD is working on counting from the DDS in the SDR (I think) so we don’t have to mess with the 200 mhz LO.
 
Bob – K5KDN is working on a board with phase locked voltage control from the 10 khz osc on the Jupiter, and hopefully will make mods to mount the board directly to the Jupiter DIP pins, and also offer ‘off board’ connects to the Xylo.
 
This is finally getting to some design phase! Should be slick!
 
Drat, missed the leap second again!
 
Thanks
Eric
 
 
 
 

From: [EMAIL PROTECTED] [ mailto:[EMAIL PROTECTED]] On Behalf Of Tom Clark, W3IWI
Sent: Sunday, January 01, 2006 9:25 PM
To: KD5NWA
Cc: FlexRadio@flex-radio.biz
Subject: Re: [Flexradio] A question on Frequency stability vs. Temperature
 
KD5NWA wrote:
The project being discussed for the Xylo is;

1.      Thermal isolation with a accurate heater to reduce the drift.
2.      Use the Xylo to connect to a GPS and have a accurate 1 pps clock
3.      Use the 1 pps clock to measure the DDS 200MHz clock, integrate multiple reading to make for finer resolution.
4.      Use the 1 pps clock to measure the A/D clock, take multiple readings also.
5.      Feed the results to the PC who will proceed to correct the internal math so there is no drift.
Let me suggest a different approach at step 3. Connect the DDS reference to a long counter (more than one second) -- it can be straight binary, and 32 bits is overkill. Use the 1PPS to strobe the counter into a register without stopping the counter (i.e. like lap timing with a stop watch). Then make your corrections based on accumulated phase, which can then be averaged over many seconds.

73, Tom


Cecil Bayona
KD5NWA
www.qrpradio.com

"I fail to see why doing the same thing over and over and getting the same results every time is insanity: I've almost proved it isn't; only a few more tests now and I'm sure results will differ this time ... "

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