On 07/01/2011 11:26 AM, Mark Morgan Lloyd wrote:
Michael Schnell wrote:
In another topic (now closed) Andrew described that a code similar to
HansPeter's example did run correctly on a dual core machine, but
produced errors on a machine with more cores.
I've not been reading every message. Definitive URL?
Topics:
[fpc-devel] volatile variables
and over in the lazarus mailing list:
[Lazarus] thread safe
So the really big question is whether any given computer has a robust
SMP implementation, or if in actual fact it's some species of NUMA
with unreliable cache coherency.
It might also be necessary to distinguish between SMP, multicore and
hyperthreading.
While this of course is correct, this is not something a user program
should know about. It the user program adheres to the Posix specs, I
think the infrastructure (compiler, libraries, OS, Hardware) is supposed
to correctly handle the dirty details.
Biggest x86 system I've got here is a Compaq with 2x Xeons which I
think are 2x multicore rather than HT. More interestingly I've got a
12-way SMP Sun, and they've been in this game for a while. Linux-only
in both cases.
Sound like interesting test cases. Andrew himself did not provide the
code that failed. Maybe some information from the other topics might be
helpful.
Thanks,
-Michael
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