Den 13-09-2011 10:15, Michael Schnell skrev:
On 09/12/2011 11:16 PM, Hans-Peter Diettrich wrote:
- watchpoints. break when data at memory address changed.
I've seen applications crawl when such a feature was used :-(
This is bound to happen unless the CPU provides support for this. (I
have no idea which of the CPUs supported by FPC has what kind of
hardware data-breakpoint support. I suppose this is a very complex list).
-Michael
i386, x86_64 and ARM has watchpoint/hardware breakpoint support. It's
not really hard on either of them to implement.
For i386 and x86_64 you can simply write values into DR0-DR3 with
entries and configure them through DR6,7(if the OS supports that, I
would guess that Windows does since it exposes them in the CONTEXT
type). That limits the number to 4 watchpoints/breakpoints, but since
breakpoints can be inserted into the code on this platform the number of
breakpoints doesn't have to be limited here.
For ARM embedded you usually have to go through a JTAG/SWD library, and
communicate with the core debugger. ARM seems to have all types freely
documented. I'm working on a JTAG library, and have rudimentary support
for Cortex-M3 and soon Cortex-A8. An ARM-Linux platform would need
hardware debugger monitor support, which I guess would exist somehow.
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