Hmmm, could be fun to attempt to test - I'll see what I can set up.
Kit
On 03/10/2023 06:30, Tomas Hajny via fpc-devel wrote:
On October 3, 2023 03:32:34 +0200, "J. Gareth Moreton via fpc-devel"
<fpc-devel@lists.freepascal.org> wrote:
Hii Kit,
This is mainly to Florian, but also to anyone else who can answer the question
- at which point did a complex LEA instruction (using all three input operands
and some other specific circumstances) get slow? Preliminary research suggests
the 486 was when it gained extra latency, and then Sandy Bridge when it got
particularly bad. Icy Lake seems to be the architecture where faster LEA
instructions are reintroduced, but I'm not sure about AMD processors.
I cannot answer your question, but if you prepare a test program, I can run it
on an Intel 486 DX2 100 Mhz and AMD Athlon 1 GHz machines if it helps you in
any way (at least I hope the 486 DX2 machine should be still able to start ;-)
).
Tomas
_______________________________________________
fpc-devel maillist - fpc-devel@lists.freepascal.org
https://lists.freepascal.org/cgi-bin/mailman/listinfo/fpc-devel
_______________________________________________
fpc-devel maillist - fpc-devel@lists.freepascal.org
https://lists.freepascal.org/cgi-bin/mailman/listinfo/fpc-devel
