Hi everyone,
So I'm getting ready to showcase my current vector work to others. I do
have a question though...
Currently the feature is locked behind "-Sv", since this is
specificially "support vector processing" and the feature is still
experimental and inefficient in places, but is this the right approach?
I ask because the -S switches are specifically syntax options, not code
generation options (I do wonder exactly what syntax it enables). Also,
at least with the "make" script, it skips whole program optimisation and
some of the packages.
Should I use a compiler definition instead like "-dX86_VECTORS"? That
way, the feature can easily be turned off.
Kit
On 21/08/2024 15:59, J. Gareth Moreton via fpc-devel wrote:
Hi everyone,
Just thought I'd give a heads-up on what's happening with me and the
compiler improvements. Also, I've been busy with contract work and
have just had some minor surgery, so I'm not running on all cylinders
currently.
* Still waiting on administrator comments and feedback on my
assembly-level CSE feature (a couple of years old now) and the
first part of pure functions. Both of these should be ready to
merge unless someone found a bug that breaks things (someone did
find some examples with pure functions which have since been fixed).
* Haven't solved the SEH unwinding problem on aarch64-win64 yet.
This is quite a tough one!
* Also working on vectorisation for x86_64 platforms. I've got it
working on win64, and can vectorise two-operand commutative
operations like addition and multiplication, although some of the
generated code is less than optimal (unnecessarily copying vectors
to the stack). Linux (and other OSes that use the System V ABI)
is taking a bit longer since it stores pairs of floats in single
XMM registers even without vectorisation code, and some of the
internal procedures can't properly handle these if the desire is
to combine a pair of these such registers (so 4 singles) into a
single XMM vector, especially where shuffling is involved.
I'll let you know the progress.
Kit
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