Hi Greg
Thanks for the comments. Oh yes there will not be any QT ! I agree on
larger RAM on prototypes, and that is generally what I do on commercial
product. I'll stay with the Xilinx current Buildroot distro so it has
feel of linux and the FS.
Yes enough RAM to do the job and a bit, plus some extra partial
reconfiguration of the (FPGA) fabric images.
128 and 256MB would be candidates, they fit in the same hole. I would
need to go up to 32 bit wide to go to 512MB , which of course is useful
for speed refilling those cache queues but again incrementially
increases design time and build and size. We will probably end up and
128 or 256MB. Careful use of cache line locking and the 128 bit wide
processor side OCM should be able to hold most of to stuff that would hurt.
-glen
On 20/07/2020 3:06 am, Greg Troxel wrote:
we cannot go overkill. W need enough room for verbose symbol tables,
--
Glen English
RF Communications and Electronics Engineer
CORTEX RF
&
Pacific Media Technologies Pty Ltd
ABN 40 075 532 008
PO Box 5231 Lyneham ACT 2602, Australia.
au mobile : +61 (0)418 975077
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