[Bug middle-end/36444] New: [4.4 Regression] ICE in gen_lowpart_general with -O1 with vector registers

[pinskia at gcc dot gnu dot org]

Testcase:
#define vector __attribute__((vector_size(16) ))
struct struct1  {
  union {}    vmx;
  struct struct2   {
    struct2(const struct2& r) {}
  } w;
} __attribute__((aligned(16)));
struct struct3  {
  vector float vmx;
  operator const struct1& () const{
    return *reinterpret_cast<const struct1*>(this);
  }
};
struct3 func3( struct3 V1);
struct3 func2( void );
void func1( )  {
  struct1 vVec = func2() ;
  func3 ( (struct3&)vVec );
}

--- CUT ---
On PowerPC use -O1 -maltivec, on x86 use -msse2 -O1.  This was exposed by my
using VCE more patch.


-- 
           Summary: [4.4 Regression] ICE in gen_lowpart_general with -O1
                    with vector registers
           Product: gcc
           Version: 4.4.0
            Status: UNCONFIRMED
          Keywords: ice-on-valid-code
          Severity: normal
          Priority: P3
         Component: middle-end
        AssignedTo: unassigned at gcc dot gnu dot org
        ReportedBy: pinskia at gcc dot gnu dot org
GCC target triplet: powerpc*-*-*


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=36444