[Bug middle-end/36444] [4.4 Regression] ICE in gen_lowpart_general with -O1 with vector registers

[pinskia at gcc dot gnu dot org]

------- Comment #2 from pinskia at gcc dot gnu dot org  2008-06-05 23:13 -------
And the fix for the second issue:
Index: expr.c
===================================================================
--- expr.c      (revision 2510)
+++ expr.c      (working copy)
@@ -7654,6 +7654,16 @@ expand_expr_real_1 (tree exp, rtx target
              {
                if (target == 0)
                  target = assign_temp (type, 0, 1, 1);
+
+               /* If we don't have a memory location for op0, make a new
location for it. */
+               if (!MEM_P (op0))
+                 {
+                   rtx op0_mem = assign_stack_temp (GET_MODE (op0),
+                                                    GET_MODE_SIZE (GET_MODE
(op0)),
+                                                    0);
+                   emit_move_insn (op0_mem, op0);
+                   op0 = op0_mem;
+                 }

                if (bitsize == 0)
                  return target;


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=36444