------- Comment #7 from Joey dot ye at intel dot com 2008-08-27 08:07 -------
Created an attachment (id=16155)
--> (http://gcc.gnu.org/bugzilla/attachment.cgi?id=16155&action=view)
Test case from 2006.434.zeusmp
Though fail to extract a smaller case, hopeful it helpful.
Compile with gfortran -c -O2 -DSPEC_CPU_LP64 tranx1.f -S -fdump-rtl-all -g.
Miscompile in revision 139590.
In IRA dump file, I believe following suspicious RTL is the cause of segfault:
(insn 886 885 893 35 tranx1.f:570 (set (reg:DI 0 ax [orig:123 D.3215 ] [123])
(mem/c:DI (plus:DI (reg/f:DI 7 sp)
(const_int -104 [0xffffffffffffff98])) [68 D.3215+0 S8 A64]))
89 {*movdi_1_rex64} (nil))
(insn 893 886 896 35 tranx1.f:570 (set (mem/c:DI (plus:DI (reg/f:DI 7 sp)
(const_int -104 [0xffffffffffffff98])) [68 ivtmp.160+0 S8 A64])
(reg/f:DI 3 bx [orig:159 ivtmp.160 ] [159])) 89 {*movdi_1_rex64} (nil))
D.3215 and ivtmp.160 shares the spill space (%rsp-104), where as D.3215 and
ivtmp.160 has overlapped liverange.
--
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=37243
