We expand __builtin___clear_cache() to a 'synci' instruction on ISA_HAS_SYNCI
systems, which invalidates the icache only on the local CPU.
On an SMP system, the caches on all CPUs should be invalidated. To achieve
this we need to drop back to the old way of doing things by using the cache
flush system call.
--
Summary: MIPS: __builtin___clear_cache() broken on SMP
ISA_HAS_SYNCI systems.
Product: gcc
Version: 4.4.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
AssignedTo: unassigned at gcc dot gnu dot org
ReportedBy: daney at gcc dot gnu dot org
GCC build triplet: mips64-unknown-linux-gnu
GCC host triplet: mips64-unknown-linux-gnu
GCC target triplet: mips64-unknown-linux-gnu
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=39079
