------- Comment #2 from jakub at gcc dot gnu dot org 2010-03-22 18:22 -------
In the second testcase it is actually TER that breaks this (both on the trunk
and 4.4-RH).
In *.nrv we still have:
[d.c : 4:4] l_2 = l_1(D) + 1;
[d.c : 4:4] # DEBUG l => l_2
[d.c : 6:9] # DEBUG h => n_3(D)
[d.c : 7:11] # DEBUG i => k_5(D)
[d.c : 7:19] k_7 = k_5(D) + 1;
[d.c : 7:19] # DEBUG k => k_7
[d.c : 8:11] # DEBUG j => m_8(D)
[d.c : 8:19] m_10 = m_8(D) + 1;
[d.c : 8:19] # DEBUG m => m_10
[d.c : 10:3] __asm__ __volatile__("" : : "r" k_7, "r" l_2, "r" m_10);
[d.c : 11:1] return;
and the right block. Not sure why we do TER for "r" constraint, but even if we
do and it turns that some of the generated insns match what has been TERed, it
would be good to adjust locus and block of the insns.
--
jakub at gcc dot gnu dot org changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |matz at gcc dot gnu dot org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43479
