The following testcase int x (int t) { if (t & 256) return -26; return 0; }
can be implemented as a sequence of two shifts and one and operation: movl 4(%esp), %eax sall $23, %eax sarl $31, %eax andl $-26, %eax ret Initial RTL generation produces a more complicated sequence which is not optimized unless the combiner is extended to handle four insns. The tree optimizers could be enhanced to handle this pattern and related ones, although it would have to take costs into account, as on some targets other sequences may be better. -- Summary: Tree-optimization misses a trick with bit tests Product: gcc Version: 4.6.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: tree-optimization AssignedTo: unassigned at gcc dot gnu dot org ReportedBy: bernds at gcc dot gnu dot org GCC build triplet: i686-pc-linux-gnu GCC host triplet: i686-pc-linux-gnu GCC target triplet: i686-pc-linux-gnu http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45215