http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60203
--- Comment #5 from Michael Meissner <meissner at gcc dot gnu.org> --- Author: meissner Date: Sun Feb 16 03:19:11 2014 New Revision: 207809 URL: http://gcc.gnu.org/viewcvs?rev=207809&root=gcc&view=rev Log: [gcc] 2014-02-15 Michael Meissner <meiss...@linux.vnet.ibm.com> PR target/60203 * config/rs6000/rs6000.md (rreg): Add TFmode, TDmode constraints. (mov<mode>_internal, TFmode/TDmode): Split TFmode/TDmode moves into 64-bit and 32-bit moves. On 64-bit moves, add support for using direct move instructions on ISA 2.07. Also adjust instruction length for 64-bit. (mov<mode>_64bit, TFmode/TDmode): Likewise. (mov<mode>_32bit, TFmode/TDmode): Likewise. [gcc/testsuite] 2014-02-15 Michael Meissner <meiss...@linux.vnet.ibm.com> PR target/60203 * gcc.target/powerpc/pr60203.c: New testsuite. Added: branches/ibm/gcc-4_8-branch/gcc/testsuite/gcc.target/powerpc/pr60203.c - copied unchanged from r207808, trunk/gcc/testsuite/gcc.target/powerpc/pr60203.c Modified: branches/ibm/gcc-4_8-branch/gcc/ChangeLog.ibm branches/ibm/gcc-4_8-branch/gcc/config/rs6000/rs6000.md branches/ibm/gcc-4_8-branch/gcc/testsuite/ChangeLog.ibm
