https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65082
--- Comment #3 from NickParker at Eaton dot com --- register uint16_t r4 asm ("r4"); register uint16_t r6 asm ("r6"); volatile int8_t localOscCosine; volatile int8_t acInput; void pllExec(void) { int16_t mix_output_s2=0; r4 += r6; localOscCosine = pgm_read_byte(&cosine7b[r4 >> 8]); mix_output_s2 = (localOscCosine * acInput); // GCC-AVR it give 16-bits.... }; --------------------------------------- results in..... void pllExec(void) 39:pll.c **** { 15 .loc 1 39 0 16 .cfi_startproc 17 /* prologue: function */ 18 /* frame size = 0 */ 19 /* stack size = 0 */ 20 .L__stack_usage = 0 21 .LVL0: 40:pll.c **** //int16_t ss; 41:pll.c **** int16_t mix_output_s2=0; 42:pll.c **** r4 += r6; 22 .loc 1 42 0 23 0000 F301 movw r30,r6 24 0002 E40D add r30,r4 25 0004 F51D adc r31,r5 26 0006 2F01 movw r4,r30 27 .LVL1: 28 .LBB2: