[Bug target/68102] [5/6 Regression] ICE: RTL check: expected code 'reg', have 'subreg' in rhs_regno, at rtl.h:1782 with float64x1_t @ aarch64

[ktkachov at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68102

--- Comment #3 from ktkachov at gcc dot gnu.org ---
Author: ktkachov
Date: Tue Oct 27 18:32:37 2015
New Revision: 229455

URL: https://gcc.gnu.org/viewcvs?rev=229455&root=gcc&view=rev
Log:
[AArch64] PR 68102: Check that operand is REG before checking the REGNO in
mov-immediate splitters

        PR target/68102
        * config/aarch64/aarch64.md (*movsi_aarch64): Check that
        operands[0] is a reg before taking its REGNO in split condition.
        (*movdi_aarch64): Likewise.

        * gcc.target/aarch64/pr68102_1.c: New test.


Added:
    trunk/gcc/testsuite/gcc.target/aarch64/pr68102_1.c
Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/config/aarch64/aarch64.md
    trunk/gcc/testsuite/ChangeLog