https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70799
--- Comment #6 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to Uroš Bizjak from comment #5)
> (In reply to Uroš Bizjak from comment #0)
> > These should all be converted to DImode vector shifts for SSE2/AVX2 32bit
> > target (and similar for rotates):
>
> There are no corresponding SSE insns for rotates.
There are only variable logical shifts missing from the set of possible STV
transformations on x86. There is slight complication present: in contrast to
integer instructions, SSE shifts don't use masked count operand, so masking of
count operand is necessary. Loading of 0x63 constant and executing AND on SSE
register can be costly, so masking should be performed with a SImode integer
instruction. After that, SImode value can be moved to SSE register and used in
a shift.
OTOH, following code for a simple DImode shift:
movl 4(%esp), %ecx
movl a+4, %edx
movl a, %eax
shrdl %edx, %eax
shrl %cl, %edx
testb $32, %cl
je .L2
movl %edx, %eax
xorl %edx, %edx
.L2:
movl %eax, c
movl %edx, c+4
ret
would be converted to:
movl 4(%esp), %eax
andl $63, %eax
movd %eax, %xmm1
movq a, %xmm0
psrlq %xmm1, %xmm0
movq %xmm0, c
ret
if we don't care about undefined values, then
movzbl 4(%esp), %eax
movd %eax, %xmm1
movq a, %xmm0
psrlq %xmm1, %xmm0
movq %xmm0, c
ret
would do the trick, too.
