https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78660
--- Comment #16 from mpf at gcc dot gnu.org --- (In reply to Eric Botcazou from comment #15) > That's incorrect, see what reload1.c:eliminate_regs_1 says about it: > > if (MEM_P (new_rtx) > && ((x_size < new_size > /* On RISC machines, combine can create rtl of the form > (set (subreg:m1 (reg:m2 R) 0) ...) > where m1 < m2, and expects something interesting to > happen to the entire word. Moreover, it will use the > (reg:m2 R) later, expecting all bits to be preserved. > So if the number of words is the same, preserve the > subreg so that push_reload can see it. */ > && !(WORD_REGISTER_OPERATIONS > && (x_size - 1) / UNITS_PER_WORD > == (new_size -1 ) / UNITS_PER_WORD)) > || x_size == new_size) > ) > return adjust_address_nv (new_rtx, GET_MODE (x), SUBREG_BYTE (x)); > else > return gen_rtx_SUBREG (GET_MODE (x), new_rtx, SUBREG_BYTE (x)); I was just contemplating your comments on LRA and coming to the conclusion it must be LRA in the end. The implications of the subreg with WORD_REGISTER_OPERATIONS are quite a brain teaser. I'll move on to LRA instead. I forgot to say that while reviewing this issue I saw that your original patch in combine removed a decent amount of zero extensions from MIPS. Thanks!
