https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78660
--- Comment #15 from Eric Botcazou <ebotcazou at gcc dot gnu.org> --- > So does LRA generate a full 64-bit load or an extended 32-to-64-bit load? The former it seems, I can see: (insn 218 211 8356 2 (set (reg:SI 4 $4 [2479]) (ne:SI (reg:DI 22 $22 [orig:230 _3 ] [230]) (const_int 0 [0]))) "/althome/mips/v6/src/gcc/gcc/c/c-decl.c":5551 505 {*sne_zero_disi} (nil)) (insn 8356 218 220 2 (set (mem/c:SI (plus:DI (reg/f:DI 29 $sp) (const_int 208 [0xd0])) [680 %sfp+208 S4 A64]) (reg:SI 4 $4 [2479])) "/althome/mips/v6/src/gcc/gcc/c/c-decl.c":5551 312 {*movsi_internal} (nil)) [...] (insn 8609 4185 4186 635 (set (reg/v:DI 2 $2 [orig:279 threadp ] [279]) (mem/c:DI (plus:DI (reg/f:DI 29 $sp) (const_int 208 [0xd0])) [680 %sfp+208 S8 A64])) "/althome/mips/v6/src/gcc/gcc/c/c-decl.c":6618 310 {*movdi_64bit} (nil)) That's incorrect, see what reload1.c:eliminate_regs_1 says about it: if (MEM_P (new_rtx) && ((x_size < new_size /* On RISC machines, combine can create rtl of the form (set (subreg:m1 (reg:m2 R) 0) ...) where m1 < m2, and expects something interesting to happen to the entire word. Moreover, it will use the (reg:m2 R) later, expecting all bits to be preserved. So if the number of words is the same, preserve the subreg so that push_reload can see it. */ && !(WORD_REGISTER_OPERATIONS && (x_size - 1) / UNITS_PER_WORD == (new_size -1 ) / UNITS_PER_WORD)) || x_size == new_size) ) return adjust_address_nv (new_rtx, GET_MODE (x), SUBREG_BYTE (x)); else return gen_rtx_SUBREG (GET_MODE (x), new_rtx, SUBREG_BYTE (x));