https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88469
--- Comment #6 from Richard Earnshaw <rearnsha at gcc dot gnu.org> --- Author: rearnsha Date: Tue Jan 22 14:03:22 2019 New Revision: 268151 URL: https://gcc.gnu.org/viewcvs?rev=268151&root=gcc&view=rev Log: [arm] PR target/88469 fix incorrect argument passing with 64-bit bitfields Unfortunately another PCS bug has come to light with the layout of structs whose alignment is dominated by a 64-bit bitfield element. Such fields in the type list appear to have alignment 1, but in reality, for the purposes of alignment of the underlying structure, the alignment is derived from the underlying bitfield's type. We've been getting this wrong since support for over-aligned record types was added several releases back. Worse still, the existing code may generate unaligned memory accesses that may fault on some versions of the architecture. I've taken the opportunity to add a few more tests that check the passing arguments with overalignment in the PCS. Looking through the existing tests it looked like they were really only checking self-consistency and not the precise location of the arguments. PR target/88469 gcc: * config/arm/arm.c (arm_needs_doubleword_align): Return 2 if a record's alignment is dominated by a bitfield with 64-bit aligned base type. (arm_function_arg): Emit a warning if the alignment has changed since earlier GCC releases. (arm_function_arg_boundary): Likewise. (arm_setup_incoming_varargs): Likewise. gcc/testsuite: * gcc.target/arm/aapcs/bitfield1.c: New test. * gcc.target/arm/aapcs/overalign_rec1.c: New test. * gcc.target/arm/aapcs/overalign_rec2.c: New test. * gcc.target/arm/aapcs/overalign_rec3.c: New test. Added: trunk/gcc/testsuite/gcc.target/arm/aapcs/bitfield1.c trunk/gcc/testsuite/gcc.target/arm/aapcs/overalign_rec1.c trunk/gcc/testsuite/gcc.target/arm/aapcs/overalign_rec2.c trunk/gcc/testsuite/gcc.target/arm/aapcs/overalign_rec3.c Modified: trunk/gcc/ChangeLog trunk/gcc/config/arm/arm.c trunk/gcc/testsuite/ChangeLog