https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94113
Andrew Pinski <pinskia at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|UNCONFIRMED |RESOLVED
Resolution|--- |INVALID
--- Comment #3 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
You need an early clobber:
__asm__ volatile("movl %3, %0;\n\t" \
"cmpl $0, %1;\n\t" \
"cmovne %2, %0;\n\t" \
: "=&r"(final_result) \
: "r"(cond), "r"(if_true), "r"(if_false) \
: "cc" \
);
Otherwise GCC thinks 0th operand and the second operand can be in the same
register. With the early clobber it basically says the 0th operand cannot be
the same register as the other ones.
