https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97875
--- Comment #2 from Christophe Lyon <clyon at gcc dot gnu.org> --- Checking the Arm v8-M manual, my understanding is that this architecture does not support unaligned vector loads/stores. However, my understanding is that vldrw.32 accepts to load from addresses aligned on 32 bits, which is the case since a and b are pointers to int32_t.
