https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98891
Bug ID: 98891
Summary: [11 regression] Neon logical operations not vectorized
in DImode since
g:cdfc0e863a03698a80c74896cbdc9f5c8c652e64
Product: gcc
Version: 11.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: clyon at gcc dot gnu.org
Target Milestone: ---
Since g:cdfc0e863a03698a80c74896cbdc9f5c8c652e64 (r10-2761), I have noticed
that vorr/vorn is no longer vectorized in DImode.
I am compiling a modified version of
gcc/testsuite/gcc.target/arm/neon-vorns64.c with -mfloat-abi=hard
-mcpu=cortex-a9 -mfpu=auto -O3:
====================================================
#include "arm_neon.h"
#include <stdlib.h>
int64x1_t out_int64x1_t = 0;
int64x1_t arg0_int64x1_t = (int64x1_t)0xdeadbeef00000000LL;
int64x1_t arg1_int64x1_t = (int64x1_t)(~0xdead00000000beefLL);
int main (void)
{
out_int64x1_t = vorn_s64 (arg0_int64x1_t, arg1_int64x1_t);
if (out_int64x1_t != (int64x1_t)0xdeadbeef0000beefLL)
abort();
return 0;
}
====================================================
Before that commit I get:
vldr.64 d17, [r3] @ int
...
vldr.64 d16, [r3, #8] @ int
vorn d16, d16, d17
...
After that commit:
ldr lr, [r3]
ldr r4, [r3, #8]
ldr ip, [r3, #4]
ldr r6, [r3, #12]
mvn r3, lr
orr r0, r4, r3
...
mvn r3, ip
orr r1, r6, r3
...
Recent trunk has:
ldrd r2, [r1]
ldrd r0, [r1, #8]
mvn r2, r2
mvn r3, r3
orr r2, r2, r0
...
orr r3, r3, r1
