https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101472
Hongtao.liu <crazylht at gmail dot com> changed:
What |Removed |Added
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CC| |wwwhhhyyy333 at gmail dot com
--- Comment #1 from Hongtao.liu <crazylht at gmail dot com> ---
pattern is defined as
(define_insn "*avx512f_scatterdi<VI48F:mode>"
[(set (match_operator:VI48F 5 "vsib_mem_operator"
[(unspec:P
[(match_operand:P 0 "vsib_address_operand" "Tv")
(match_operand:<VEC_GATHER_IDXDI> 2 "register_operand" "v")
(match_operand:SI 4 "const1248_operand" "n")]
UNSPEC_VSIBADDR)])
(unspec:VI48F
[(match_operand:QI 6 "register_operand" "1")
(match_operand:<VEC_GATHER_SRCDI> 3 "register_operand" "v")]
UNSPEC_SCATTER))
(clobber (match_scratch:QI 1 "=&Yk"))]
"TARGET_AVX512F"
;; %X5 so that we don't emit any *WORD PTR for -masm=intel, as
;; gas changed what it requires incompatibly.
"%M0v<sseintprefix>scatterq<ssemodesuffix>\t{%3, %5%{%1%}|%X5%{%1%}, %3}"
[(set_attr "type" "ssemov")
(set_attr "prefix" "evex")
(set_attr "mode" "<sseinsnmode>")])
mask register only affect set src, w/ same dest, gcc thinks the first set will
be overlapped, and optimizes the first vpscatterqpd away
we need to refine the pattern to let gcc know mask register also affect the
dest. maybe just put mask operation into UNSPEC_VSIBADDR?
