https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103676

--- Comment #24 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Vladimir Makarov <vmaka...@gcc.gnu.org>:

https://gcc.gnu.org/g:85419ac59724b7ce710ebb4acf03dbd747edeea3

commit r12-6803-g85419ac59724b7ce710ebb4acf03dbd747edeea3
Author: Vladimir N. Makarov <vmaka...@redhat.com>
Date:   Fri Jan 21 13:34:32 2022 -0500

    [PR103676] LRA: Calculate and exclude some start hard registers for reload
pseudos

    LRA and old reload pass uses only one register class for reload pseudos
even if
    operand constraints contain more one register class.  Let us consider
    constraint 'lh' for thumb arm which means low and high thumb registers.
    Reload pseudo for such constraint will have general reg class (union of
    low and high reg classes).  Assigning the last low register to the reload
    pseudo is wrong if the pseudo is of DImode as it requires two hard regs.
    But it is considered OK if we use general reg class.  The following patch
    solves this problem for LRA.

    gcc/ChangeLog:

            PR target/103676
            * ira.h (struct target_ira): Add member
            x_ira_exclude_class_mode_regs.
            (ira_exclude_class_mode_regs): New macro.
            * lra.h (lra_create_new_reg): Add arg exclude_start_hard_regs and
            move from here ...
            * lra-int.h: ... to here.
            (lra_create_new_reg_with_unique_value): Add arg
            exclude_start_hard_regs.
            (class lra_reg): Add member exclude_start_hard_regs.
            * lra-assigns.cc (find_hard_regno_for_1): Setup
            impossible_start_hard_regs from exclude_start_hard_regs.
            * lra-constraints.cc (get_reload_reg): Add arg
exclude_start_hard_regs and pass
            it lra_create_new_reg[_with_unique_value].
            (match_reload): Ditto.
            (check_and_process_move): Pass NULL
            exclude_start_hard_regs to lra_create_new_reg_with_unique_value.
            (goal_alt_exclude_start_hard_regs): New static variable.
            (process_addr_reg, simplify_operand_subreg): Pass NULL
            exclude_start_hard_regs to lra_create_new_reg_with_unique_value
            and get_reload_reg.
            (process_alt_operands): Setup goal_alt_exclude_start_hard_regs.
            Use this_alternative_exclude_start_hard_regs additionally to find
            winning operand alternative.
            (base_to_reg, base_plus_disp_to_reg, index_part_to_reg): Pass NULL
            exclude_start_hard_regs to lra_create_new_reg.
            (process_address_1, emit_inc): Ditto.
            (curr_insn_transform): Pass exclude_start_hard_regs value to
            lra_create_new_reg, get_reload_reg, match_reload.
            (inherit_reload_reg, split_reg): Pass NULL exclude_start_hard_regs
            to lra_create_new_reg.
            (process_invariant_for_inheritance): Ditto.
            * lra-remat.cc (update_scratch_ops): Ditto.
            * lra.cc (lra_create_new_reg_with_unique_value): Add arg
            exclude_start_hard_regs.  Setup the corresponding member of
            lra reg info.
            (lra_create_new_reg): Add arg exclude_start_hard_regs and pass it
            to lra_create_new_reg_with_unique_value.
            (initialize_lra_reg_info_element): Initialize member
            exclude_start_hard_regs.
            (get_scratch_reg): Pass NULL to lra_create_new_reg.
            * ira.cc (setup_prohibited_class_mode_regs): Rename to
            setup_prohibited_and_exclude_class_mode_regs and calculate
            ira_exclude_class_mode_regs.

    gcc/testsuite/ChangeLog:

            PR target/103676
            * g++.target/arm/pr103676.C: New.

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