https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104688
--- Comment #16 from CVS Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Jakub Jelinek <ja...@gcc.gnu.org>: https://gcc.gnu.org/g:4a7a846687e076eae58ad3ea959245b2bf7fdc07 commit r13-4048-g4a7a846687e076eae58ad3ea959245b2bf7fdc07 Author: Jakub Jelinek <ja...@redhat.com> Date: Tue Nov 15 08:14:45 2022 +0100 libatomic: Handle AVX+CX16 AMD like Intel for 16b atomics [PR104688] We got a response from AMD in https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104688#c10 so the following patch starts treating AMD with AVX and CMPXCHG16B ISAs like Intel by using vmovdqa for atomic load/store in libatomic. We still don't have confirmation from Zhaoxin and VIA (anything else with CPUs featuring AVX and CX16?). 2022-11-15 Jakub Jelinek <ja...@redhat.com> PR target/104688 * config/x86/init.c (__libat_feat1_init): Don't clear bit_AVX on AMD CPUs.
