https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110943
Bug ID: 110943
Summary: RISC-V: vmv.v.x and vmv.s.x pattern combine error
Product: gcc
Version: 13.2.1
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: lehua.ding at rivai dot ai
Target Milestone: ---
Consider this code (https://godbolt.org/z/TKoqjxTPh):
```c
#include <riscv_vector.h>
void foo9 (void *base, void *out, size_t vl)
{
int64_t scalar = *(int64_t*)(base + 100);
vint64m2_t v = __riscv_vmv_v_x_i64m2 (0, 1);
*(vint64m2_t*)out = v;
}
```
the asm of GCC:
```asm
foo9:
vsetvli a5,zero,e64,m2,ta,ma
vmv.v.i v2,0
vsetivli zero,1,e64,m2,ta,ma
vse64.v v2,0(a1)
ret
```
the asm of LLVM:
```asm
foo9: # @foo9
vsetivli zero, 1, e64, m2, ta, ma
vmv.v.i v8, 0
vs2r.v v8, (a1)
ret
```
I think the GCC changes the semantics of full store `*(vint64m2_t*)out = v;`.If
there is a memory exception when storing the second element of v, then LLVM's
code will cause but GCC's code doesn't.
Confirmed on GCC 13.2.0 and Trunk.
