https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111751
Bug ID: 111751
Summary: RISC-V: RVV unexpected vectorization
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: c
Assignee: unassigned at gcc dot gnu.org
Reporter: juzhe.zhong at rivai dot ai
Target Milestone: ---
#include <stdlib.h>
#define N 16
int main ()
{
int i;
char ia[N];
char ic[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45};
char ib[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45};
/* Not vectorizable, multiplication */
for (i = 0; i < N; i++)
{
ia[i] = ib[i] * ic[i];
}
/* check results: */
for (i = 0; i < N; i++)
{
if (ia[i] != (char) (ib[i] * ic[i]))
abort ();
}
return 0;
}
RVV GCC ASM:
main:
lui a5,%hi(.LANCHOR0)
addi a5,a5,%lo(.LANCHOR0)
addi sp,sp,-48
ld a4,0(a5)
ld a5,8(a5)
sd a5,8(sp)
sd a5,24(sp)
sd ra,40(sp)
addi a5,sp,16
sd a4,0(sp)
sd a4,16(sp)
vsetivli zero,16,e8,m1,ta,ma
vle8.v v1,0(a5)
vle8.v v2,0(sp)
vmul.vv v1,v1,v2
vmv.x.s a5,v1
andi a5,a5,0xff
bne a5,zero,.L2
vslidedown.vi v2,v1,1
li a4,9
vmv.x.s a5,v2
andi a5,a5,0xff
bne a5,a4,.L2
vslidedown.vi v2,v1,2
li a4,36
vmv.x.s a5,v2
andi a5,a5,0xff
bne a5,a4,.L2
vslidedown.vi v2,v1,3
li a4,81
vmv.x.s a5,v2
andi a5,a5,0xff
bne a5,a4,.L2
vslidedown.vi v2,v1,4
li a4,144
vmv.x.s a5,v2
andi a5,a5,0xff
bne a5,a4,.L2
vslidedown.vi v2,v1,5
li a4,225
vmv.x.s a5,v2
andi a5,a5,0xff
bne a5,a4,.L2
vslidedown.vi v2,v1,6
li a4,68
vmv.x.s a5,v2
andi a5,a5,0xff
bne a5,a4,.L2
vslidedown.vi v2,v1,7
li a4,185
vmv.x.s a5,v2
andi a5,a5,0xff
bne a5,a4,.L2
vslidedown.vi v2,v1,8
li a4,64
vmv.x.s a5,v2
andi a5,a5,0xff
bne a5,a4,.L2
vslidedown.vi v2,v1,9
li a4,217
vmv.x.s a5,v2
andi a5,a5,0xff
bne a5,a4,.L2
vslidedown.vi v2,v1,10
li a4,132
vmv.x.s a5,v2
andi a5,a5,0xff
bne a5,a4,.L2
vslidedown.vi v2,v1,11
li a4,65
vmv.x.s a5,v2
andi a5,a5,0xff
bne a5,a4,.L2
vslidedown.vi v2,v1,12
li a4,16
vmv.x.s a5,v2
andi a5,a5,0xff
bne a5,a4,.L2
vslidedown.vi v2,v1,13
li a4,241
vmv.x.s a5,v2
andi a5,a5,0xff
bne a5,a4,.L2
vslidedown.vi v2,v1,14
li a4,228
vmv.x.s a5,v2
andi a5,a5,0xff
bne a5,a4,.L2
vslidedown.vi v1,v1,15
li a4,233
vmv.x.s a5,v1
andi a5,a5,0xff
bne a5,a4,.L2
ld ra,40(sp)
li a0,0
addi sp,sp,48
jr ra
.L2:
call abort
ARM SVE GCC:
main:
mov w0, 0
ret
