https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112707
--- Comment #9 from HaoChen Gui <guihaoc at gcc dot gnu.org> --- (In reply to Segher Boessenkool from comment #8) > Yeah, it tested for ISA 2.04 before. That was an attempt at including 476 > probably? > > We really should have a TARGET_FCTID, on for TARGET_POWERPC64 or for cpu 476 > (so > NOT user-selectable separately, of course!); not try to use pre-existing > flags for this, which might work but will forever stay confusing. > > So either a separate OPTION_FCTID for in rs6000-cpus.def, or TARGET_FCTID. > Either > works for me. > > (Background: in ISA 1.xx it was for 64-bit implementations only. But it > does not > need 64-bit registers or a 64-bit integer pipeline at all, it is an FP > instruction > that works on FP registers, which always are 64-bit. The instruction was > implemented > on the 476). Thanks for your explanation. I found "fctid" is supported on PPC64 and PPC476 from assembler source code. {“fctid”, XRC(63,814,0), XRA_MASK, PPC64, PPCVLE, {FRT, FRB}}, {“fctid”, XRC(63,814,0), XRA_MASK, PPC476, PPCVLE, {FRT, FRB}}, But powerpc7450 only enables PPC. That's why assembler complains. { "7450", PPC_OPCODE_PPC | PPC_OPCODE_7450 | PPC_OPCODE_ALTIVEC, 0 }, My question is: can "fctid" be executed on powerpc7450 such a 32bit processor? If it's supported, should the assembler be changed also (replace the PPC64 with PPC for fctid)?