[Bug target/113210] [14] RISC-V vector ICE: tree check: expected integer_cst, have cond_expr in get_len, at tree.h:6481

[juzhe.zhong at rivai dot ai via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113210

--- Comment #1 from JuzheZhong <juzhe.zhong at rivai dot ai> ---
This is not RISC-V issues, it's middle-end issue.
Plz change the title and CC Richard.

https://godbolt.org/z/1bj9xaYTa

ARM SVE has the same issue.