https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111677
Alex Coplan <acoplan at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Assignee|unassigned at gcc dot gnu.org |acoplan at gcc dot
gnu.org
Status|NEW |ASSIGNED
--- Comment #22 from Alex Coplan <acoplan at gcc dot gnu.org> ---
(In reply to Richard Sandiford from comment #21)
>
> aarch64_get_separate_components is supposed to vet shrink-wrappable
> offsets, but in this case the offset looks valid, since:
>
> str q22, [sp, #512]
>
> is a valid instruction. Perhaps the constraints are too narrow?
Yeah, as discussed offline, for T{I,F}mode we deliberately restrict the range
to the ldp x-reg range, since at least for TImode we don't know pre-RA how it
will be allocated (a single q reg or a pair of x regs).
We could look at using a different mode for the save that doesn't have those
restrictions, I'll try to do that.
