https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113695
--- Comment #1 from JuzheZhong <juzhe.zhong at rivai dot ai> --- Since both operand are input operand, early clobber "&" constraint can not help.
[Bug c/113695] RISC-V: Sources with different EEW must use different registers
juzhe.zhong at rivai dot ai via Gcc-bugs Wed, 31 Jan 2024 15:15:47 -0800
- [Bug c/113695] New: RISC-V: Sourc... juzhe.zhong at rivai dot ai via Gcc-bugs
- [Bug c/113695] RISC-V: Sourc... juzhe.zhong at rivai dot ai via Gcc-bugs
