[Bug target/117594] [15] RISC-V: Miscompile at -O3

[patrick at rivosinc dot com via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117594

--- Comment #1 from Patrick O'Neill <patrick at rivosinc dot com> ---
Testcase that doesn't underflow:
unsigned a;
short b, d, e;
long long c;
int main() {
  short h = d;
  short *z = &h;
  for (_Bool i = 0; i < 1; i = 1)
    for (unsigned j = 0; j < (z[i] ?: 10); j += 3) {
      a += 9;
      b -= ~e;
    }
  __builtin_printf("%u\n", a);
}

> /scratch/tc-testing/tc-compiler-fuzz-trunk/build-gcv/bin/riscv64-unknown-linux-gnu-gcc
>  -march=rv64gcv -O2 red.c -o user-config.out -fno-strict-aliasing
> QEMU_CPU=rv64,vlen=128,rvv_ta_all_1s=true,rvv_ma_all_1s=true,v=true,vext_spec=v1.0,zve32f=true,zve32x=true,zve64d=true,zve64f=true,zve64x=true
>  timeout --verbose -k 0.1 4 
> /scratch/tc-testing/tc-compiler-fuzz-trunk/build-gcv/bin/qemu-riscv64 
> user-config.out
36