https://gcc.gnu.org/bugzilla/show_bug.cgi?id=49807
Georg-Johann Lay <gjl at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
See Also| |https://gcc.gnu.org/bugzill
| |a/show_bug.cgi?id=84211
--- Comment #8 from Georg-Johann Lay <gjl at gcc dot gnu.org> ---
(In reply to Georg-Johann Lay from comment #0)
> #define SPDR (*((char volatile*) 0x2c))
>
> void read_adc (long big)
> {
> SPDR = big >> 24;
> SPDR = big >> 16;
> SPDR = big >> 8;
> SPDR = big;
> }
The code size in v15 is considerably reduced as a byproduct of PR84211 which
adds an avr-specific post-reload optimization pass.
Code without PR84211 / -mno-fuse-move -Os -mmcu=atmega8 -dp -S
read_adc:
movw r20,r22 ; 50 [c=4 l=1] *movhi/0
movw r22,r24 ; 51 [c=4 l=1] *movhi/0
mov r24,r23 ; 52 [c=24 l=6] *ashrsi3_const/2
clr r27
sbrc r24,7
com r27
mov r25,r27
mov r26,r27
out 0xc,r24 ; 40 [c=4 l=1] movqi_insn/2
movw r24,r22 ; 53 [c=24 l=5] *ashrsi3_const/2
clr r27
sbrc r25,7
com r27
mov r26,r27
out 0xc,r24 ; 42 [c=4 l=1] movqi_insn/2
clr r27 ; 54 [c=24 l=6] *ashrsi3_const/2
sbrc r23,7
dec r27
mov r26,r23
mov r25,r22
mov r24,r21
out 0xc,r24 ; 44 [c=4 l=1] movqi_insn/2
out 0xc,r20 ; 45 [c=4 l=1] movqi_insn/2
ret ; 48 [c=0 l=1] return
Code with PR84211 / -mfuse-move -Os -mmcu=atmega8 -dp -S
read_adc:
movw r20,r22 ; 71 [c=4 l=1] *movhi/0
movw r22,r24 ; 72 [c=4 l=1] *movhi/0
out 0xc,r23 ; 40 [c=4 l=1] movqi_insn/2
out 0xc,r24 ; 42 [c=4 l=1] movqi_insn/2
out 0xc,r21 ; 44 [c=4 l=1] movqi_insn/2
out 0xc,r20 ; 45 [c=4 l=1] movqi_insn/2
ret ; 48 [c=0 l=1] return
The superfluous MOV instructions are due to sub-optimal IRA / reload. LRA even
adds one more instruction.
