[Bug rtl-optimization/119127] [15 Regression] ICE in decompose, at rtl.h:2312 during RTL pass: late_combine

[xry111 at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119127

--- Comment #3 from Xi Ruoyao <xry111 at gcc dot gnu.org> ---
It happens at:

trying to combine definition of r94 in: 
   15: r94:DI=r92:DI<<0x2&0xfffffffc
      REG_DEAD r92:DI
into:
   17: r96:DI=sign_extend(r87:SI+r94:DI#0)
      REG_DEAD r94:DI
      REG_DEAD r87:SI

i.e.

bstrpick.d t0, a0, 31, 0
slli.d     t0, t0, 2
addi.w     t0, t0, a1

But we want just

alsl.w     t0, a0, a1, 2

It seems modifying SImode to DImode as comment 1 will defeat the optimization. 
I guess we should sign extend mask in loongarch_reassoc_shift_bitwise to mode
if it's not already sign-extended.