[Bug target/119114] [14/15 regression] RISC-V: miscompile at -O3 since r14-4077-g86451305d8b

[pan2.li at intel dot com via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119114

--- Comment #2 from Li Pan <pan2.li at intel dot com> ---
Tweak test case for easy locating.

   1   │ int b[18];
   2   │ long long al;
   3   │ _Bool e;
   4   │ char f = 010;
   5   │ short t[18];
   6   │
   7   │ unsigned w[8][18][18][18];
   8   │ _Bool a;
   9   │
  10   │ //  __attribute__((noinline))
  11   │ void c(_Bool e, char f, short tmp[], unsigned w[][18][18][18]) {
  12   │   for (int ae = 1; ae < f + 5; ae += 2) { // loop idx 1, 3, 5, 7, 9,
11
  13   │     a -= (_Bool)(tmp[ae - 1] & tmp[ae + 3]);
  14   │
  15   │     for (short af = 0; af < 18; af += 2)
  16   │       for (_Bool ah = 0; ah < (w[e][1][af][0] > 0); ah = 5)
  17   │         b[af] |= 1;
  18   │   }
  19   │ }
  20   │
  21   │ int main() {
  22   │   for (int ad = 0; ad < 18; ad++)
  23   │     t[ad] = 3;
  24   │
  25   │   __asm__ volatile  ("fence\n\t"::);
  26   │
  27   │   c(e, f, t, w);
  28   │
  29   │   al = a;
  30   │   __builtin_printf("Final %llu, but expect 0.\n", al);
  31   │ }