[Bug target/100165] fmov could be used to zero out the upper bits instead of movi/zip or movi/ins with __builtin_shuffle and zero vector

[cvs-commit at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100165

--- Comment #7 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Pengxuan Zheng <pzh...@gcc.gnu.org>:

https://gcc.gnu.org/g:dc501cb0dc857663f7fa762f3dbf0ae60973d2c3

commit r16-702-gdc501cb0dc857663f7fa762f3dbf0ae60973d2c3
Author: Pengxuan Zheng <quic_pzh...@quicinc.com>
Date:   Wed May 7 10:47:37 2025 -0700

    aarch64: Recognize vector permute patterns which can be interpreted as AND
[PR100165]

    Certain permute that blends a vector with zero can be interpreted as an AND
of a
    mask. This idea was suggested by Richard Sandiford when he was reviewing my
    patch which tries to optimizes certain vector permute with the FMOV
instruction
    for the aarch64 target.

    For example, for the aarch64 target, at present:

    v4hi
    f_v4hi (v4hi x)
    {
      return __builtin_shuffle (x, (v4hi){ 0, 0, 0, 0 }, (v4hi){ 4, 1, 6, 3 });
    }

    generates:

    f_v4hi:
            uzp1    v0.2d, v0.2d, v0.2d
            adrp    x0, .LC0
            ldr     d31, [x0, #:lo12:.LC0]
            tbl     v0.8b, {v0.16b}, v31.8b
            ret
    .LC0:
            .byte   -1
            .byte   -1
            .byte   2
            .byte   3
            .byte   -1
            .byte   -1
            .byte   6
            .byte   7

    With this patch, it generates:

    f_v4hi:
            mvni    v31.2s, 0xff, msl 8
            and     v0.8b, v0.8b, v31.8b
            ret

    This patch also provides a target-independent routine for detecting vector
    permute patterns which can be interpreted as AND.

    Changes since v1:
    * v2: Rework the patch to only perform the optimization for aarch64 by
calling
    the target independent routine vec_perm_and_mask.

            PR target/100165

    gcc/ChangeLog:

            * config/aarch64/aarch64.cc (aarch64_evpc_and): New.
            (aarch64_expand_vec_perm_const_1): Call aarch64_evpc_and.
            * optabs.cc (vec_perm_and_mask): New.
            * optabs.h (vec_perm_and_mask): New prototype.

    gcc/testsuite/ChangeLog:

            * gcc.target/aarch64/and-be.c: New test.
            * gcc.target/aarch64/and-le.c: New test.

    Signed-off-by: Pengxuan Zheng <quic_pzh...@quicinc.com>