https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121064
--- Comment #11 from GCC Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Xi Ruoyao <xry...@gcc.gnu.org>: https://gcc.gnu.org/g:d626debcb3717f18bf2ee88f4281b109b13e1181 commit r16-2313-gd626debcb3717f18bf2ee88f4281b109b13e1181 Author: Xi Ruoyao <xry...@xry111.site> Date: Tue Jul 15 03:01:12 2025 +0800 LoongArch: Fix wrong code generated by TARGET_VECTORIZE_VEC_PERM_CONST [PR121064] When TARGET_VECTORIZE_VEC_PERM_CONST is called, target may be the same pseudo as op0 and/or op1. Loading the selector into target would clobber the input, producing wrong code like vld $vr0, $t0 vshuf.w $vr0, $vr0, $vr1 So don't load the selector into d->target, use a new pseudo to hold the selector instead. The reload pass will load the pseudo for selector and the pseudo for target into the same hard register (following our constraint '0' on the shuf instructions) anyway. gcc/ChangeLog: PR target/121064 * config/loongarch/lsx.md (lsx_vshuf_<lsxfmt_f>): Add '@' to generate a mode-aware helper. Use <VIMODE> as the mode of the operand 1 (selector). * config/loongarch/lasx.md (lasx_xvshuf_<lasxfmt_f>): Likewise. * config/loongarch/loongarch.cc (loongarch_try_expand_lsx_vshuf_const): Create a new pseudo for the selector. Use the mode-aware helper to simplify the code. (loongarch_expand_vec_perm_const): Likewise. gcc/testsuite/ChangeLog: PR target/121064 * gcc.target/loongarch/pr121064.c: New test.
