[Bug target/121937] [16 Regression] RISC-V rv64gcv: crash at -O3 during RTL pass: combine

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121937

--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Trying 154 -> 158:
  154: r171:V2HI={(unspec[const_vector,0x2,0,0,0,vl:SI,vtype:SI]
93)?const_vector:const_vector}
      REG_DEAD r248:V2BI
      REG_EQUAL {(unspec[const_vector,0x2,0,0,0,vl:SI,vtype:SI]
93)?const_vector:const_vector}
  158: r254:HI=unspec[vec_select(r171:V2HI,parallel),vtype:SI] 93


Looks like the crash is while simplifying this:

(insn 158 157 159 10 (set (reg:HI 254 [ _78 ])
        (unspec:HI [
                (vec_select:HI (if_then_else:V2HI (unspec:V2BI [
                                (const_vector:V2BI [
                                        (const_int 0 [0])
                                        (const_int 1 [0x1])
                                    ])
                                (const_int 2 [0x2])
                                (const_int 0 [0]) repeated x3
                                (reg:SI 66 vl)
                                (reg:SI 67 vtype)
                            ] UNSPEC_VPREDICATE)
                        (const_vector:V2HI [
                                (const_int 0 [0])
                                (const_int -1 [0xffffffffffffffff])
                            ])
                        (const_vector:V2HI [
                                (const_int -1 [0xffffffffffffffff])
                                (const_int 0 [0])
                            ]))
                    (parallel [
                            (const_int 0 [0])
                        ]))
                (reg:SI 67 vtype)
            ] UNSPEC_VPREDICATE)) "/app/example.c":58:17 20621
{*pred_extract_firstv2hi}
     (nil))