https://gcc.gnu.org/bugzilla/show_bug.cgi?id=122869
Bug ID: 122869
Summary: risc-v loops miscompiled: loop with fault-only-first
intrinsics never terminates when `-O0`
Product: gcc
Version: 16.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: rvismith1115 at gmail dot com
Target Milestone: ---
Code: https://godbolt.org/z/q45Gh9bW5
```
#include <riscv_vector.h>
uint8_t a[1];
int16_t b[1];
int main() {
for (size_t c = 0, avl = 1; avl > 0;) {
size_t d(avl);
vint16mf2_t g = __riscv_vle16ff_v_i16mf2(&b[c], &d, d);
avl -= d;
// c += d; // Segmentation fault
}
}
```
Command:
> riscv64-unknown-elf-g++ -O0 -march=rv64gcv_zvfh -mabi=lp64d -o a.out && $QEMU
> a.out
Version:
> riscv64-unknown-elf-g++ --version
riscv64-unknown-elf-g++ () 16.0.0 20251123 (experimental)
Copyright (C) 2025 Free Software Foundation, Inc.
This is free software; see the source for copying conditions. There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
Wrong assembly:
```
sub a5,a4,a5
sd a5,-24(s0)
.L2:
ld a5,-24(s0)
bne a5,zero,.L3
```
This means that the loop continues when `d != 0` not `avl != 0`.