https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118935
--- Comment #24 from tkoenig at netcologne dot de <tkoenig at netcologne dot de> --- Am 14.08.26 um 11:59 schrieb huangpei at loongson dot cn: > Base on Comment 6 and Comment 15, we can confirm that there is data race > between > find_file0 and set_internal_unit/new_unit, but Comment 15 show that **Only** > under very weakly-order memory model with Same address Read after Read Out of > Oder, SEGV can be triggered. As far as I know, Only Loong64 meet this memory > modal. So I do not think this bug can be triggered on POWER64 or ARM64； Out of curiosity: Where is this documented? I cannot find this in https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN#overview-of-memory-consistency .
