https://gcc.gnu.org/bugzilla/show_bug.cgi?id=127020
--- Comment #3 from GCC Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by H.J. Lu <[email protected]>: https://gcc.gnu.org/g:aca6b5d6eb67f452905fda689e39471e3f9a6fc4 commit r17-3620-gaca6b5d6eb67f452905fda689e39471e3f9a6fc4 Author: H.J. Lu <[email protected]> Date: Mon Aug 24 19:32:30 2026 +0800 x86-64: Check SSE4.1 for pinsrq/pextrq in TImode STV commit f2609a4c653a4993eec7ed9a2ad05caf936f0178 Author: Roger Sayle <[email protected]> Date: Sat May 16 08:44:06 2026 +0100 x86_64: Handle hard registers in TImode STV with inter-unit moves. checks TARGET_AVX for vpinsrq and vpextrq. But pinsrq and pextrq are added in SSE4_1. Check TARGET_SSE4_1 instead of TARGET_AVX for pinsrq and pextrq. gcc/ PR target/127020 * config/i386/i386-features.cc (timode_scalar_chain::compute_convert_gain): Check TARGET_SSE4_1 instead of TARGET_AVX for pinsrq and pextrq. gcc/testsuite/ PR target/127020 * gcc.target/i386/sse4_1-stv-14.c: New test. Signed-off-by: H.J. Lu <[email protected]>
