https://gcc.gnu.org/bugzilla/show_bug.cgi?id=127768
Richard Biener <rguenth at gcc dot gnu.org> changed:
What |Removed |Added
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CC| |crazylht at gmail dot com,
| |venkataramanan.kumar at amd
dot co
| |m
--- Comment #3 from Richard Biener <rguenth at gcc dot gnu.org> ---
CCed Intel/AMD folks for the optimal strategy to spill/reload - I'm
specifically thinking about the ability of some uarchs to perform memory
"renaming" to registers which IIRC is quite constrained as of the memory access
forms they accept but is specifically targeted for stack spills/reloads. The
question is for HImode/QImode spills/reloads where we seem to (always?) have at
least an SImode size spill slot and thus could in theory simply spill/reload in
SImode.
I guess spilling in QImode and reloading via movzbl would break renaming?
