https://gcc.gnu.org/bugzilla/show_bug.cgi?id=125060
--- Comment #3 from GCC Commits <cvs-commit at gcc dot gnu.org> --- The releases/gcc-16 branch has been updated by jeevitha <[email protected]>: https://gcc.gnu.org/g:041359f347cb1d48622a2c96934d06d514de7a36 commit r16-9779-g041359f347cb1d48622a2c96934d06d514de7a36 Author: Jeevitha <[email protected]> Date: Mon Oct 12 00:57:14 2026 -0500 rs6000: Extend vcond_mask to cover V1TI [PR125060] The vcond_mask_<mode><mode> expander used the VEC_I mode iterator, while the vec_cmp<mode><mode> and vec_cmpu<mode><mode> expanders already used VEC_IC, which includes V1TI for Power10. As a result, vcond_mask_v1tiv1ti was not generated for V1TI. Without vcond_mask_v1tiv1ti, expand_vec_cond_expr_p returns false for V1TI and veclower2 scalarises the VEC_COND_EXPR for vector __int128 comparisons through GPRs, losing the xxlnor instructions expected by fold-vec-cmp-int128.c and pr103316.c. Fix this by changing the iterator for vcond_mask_<mode><mode> from VEC_I to VEC_IC. 2026-10-07 Jeevitha Palanisamy <[email protected]> gcc/ PR target/125060 * config/rs6000/vector.md (vcond_mask_<mode><mode>): Change the mode iterator from VEC_I to VEC_IC to support V1TI. (cherry picked from commit eb37eb6bf47acc0b08e998de9d7517cbba648166)
