[gcc r15-2395] Refine constraint "Bk" to define_special_memory_constraint.

[hongtao Liu via Gcc-cvs]

https://gcc.gnu.org/g:bc1fda00d5f20e2f3e77a50b2822562b6e0040b2

commit r15-2395-gbc1fda00d5f20e2f3e77a50b2822562b6e0040b2
Author: liuhongt <hongtao....@intel.com>
Date:   Wed Jul 24 11:29:23 2024 +0800

    Refine constraint "Bk" to define_special_memory_constraint.
    
    For below pattern, RA may still allocate r162 as v/k register, try to
    reload for address with leaq __libc_tsd_CTYPE_B@gottpoff(%rip), %rsi
    which result a linker error.
    
    (set (reg:DI 162)
         (mem/u/c:DI
           (const:DI (unspec:DI
                     [(symbol_ref:DI ("a") [flags 0x60]  <var_decl 
0x7f621f6e1c60 a>)]
                     UNSPEC_GOTNTPOFF))
    
    Quote from H.J for why linker issue an error.
    >What do these do:
    >
    >        leaq    __libc_tsd_CTYPE_B@gottpoff(%rip), %rax
    >        vmovq   (%rax), %xmm0
    >
    >From x86-64 TLS psABI:
    >
    >The assembler generates for the x@gottpoff(%rip) expressions a R X86
    >64 GOTTPOFF relocation for the symbol x which requests the linker to
    >generate a GOT entry with a R X86 64 TPOFF64 relocation. The offset of
    >the GOT entry relative to the end of the instruction is then used in
    >the instruction. The R X86 64 TPOFF64 relocation is pro- cessed at
    >program startup time by the dynamic linker by looking up the symbol x
    >in the modules loaded at that point. The offset is written in the GOT
    >entry and later loaded by the addq instruction.
    >
    >The above code sequence looks wrong to me.
    
    gcc/ChangeLog:
    
            PR target/116043
            * config/i386/constraints.md (Bk): Refine to
            define_special_memory_constraint.
    
    gcc/testsuite/ChangeLog:
    
            * gcc.target/i386/pr116043.c: New test.

Diff:
---
 gcc/config/i386/constraints.md           |  2 +-
 gcc/testsuite/gcc.target/i386/pr116043.c | 33 ++++++++++++++++++++++++++++++++
 2 files changed, 34 insertions(+), 1 deletion(-)

diff --git a/gcc/config/i386/constraints.md b/gcc/config/i386/constraints.md
index 7508d7a58bd7..b760e7c221a1 100644
--- a/gcc/config/i386/constraints.md
+++ b/gcc/config/i386/constraints.md
@@ -187,7 +187,7 @@
   "@internal Vector memory operand."
   (match_operand 0 "vector_memory_operand"))
 
-(define_memory_constraint "Bk"
+(define_special_memory_constraint "Bk"
   "@internal TLS address that allows insn using non-integer registers."
   (and (match_operand 0 "memory_operand")
        (not (match_test "ix86_gpr_tls_address_pattern_p (op)"))))
diff --git a/gcc/testsuite/gcc.target/i386/pr116043.c 
b/gcc/testsuite/gcc.target/i386/pr116043.c
new file mode 100644
index 000000000000..76553496c109
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr116043.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512bf16 -O3" } */
+/* { dg-final { scan-assembler-not {(?n)lea.*@gottpoff} } } */
+
+extern __thread int a, c, i, j, k, l;
+int *b;
+struct d {
+  int e;
+} f, g;
+char *h;
+
+void m(struct d *n) {
+  b = &k;
+  for (; n->e; b++, n--) {
+    i = b && a;
+    if (i)
+      j = c;
+  }
+}
+
+char *o(struct d *n) {
+  for (; n->e;)
+    return h;
+}
+
+int q() {
+  if (l)
+    return 1;
+  int p = *o(&g);
+  m(&f);
+  m(&g);
+  l = p;
+}