https://gcc.gnu.org/g:dc337e3dc2d407716eef830faf4edf5ef24cdd7a
commit dc337e3dc2d407716eef830faf4edf5ef24cdd7a Author: Michael Meissner <[email protected]> Date: Fri Oct 31 18:27:22 2025 -0400 Update ChangeLog.* Diff: --- gcc/ChangeLog.float | 25 +++++++++++++++++++++++++ libstdc++-v3/ChangeLog.meissner | 11 +++++++++++ 2 files changed, 36 insertions(+) diff --git a/gcc/ChangeLog.float b/gcc/ChangeLog.float index f49f660708d3..ac5fa7778e6f 100644 --- a/gcc/ChangeLog.float +++ b/gcc/ChangeLog.float @@ -1,3 +1,28 @@ +==================== Branch work223-float, patch #320 ==================== + +Add --with-powerpc-16bit-floating-point. + +2025-10-31 Michael Meissner <[email protected]> + +gcc/ + + * config.gcc (powerpc*-*-*): Add support for the configuration option + --with-powerpc-16bit-floating-point. + * config/rs6000/rs6000-cpus.def (TARGET_16BIT_FLOATING_POINT): Likewise. + (ISA_2_7_MASKS_SERVER): Likewise. + (POWERPC_MASKS): Likewise. + +==================== Branch work223-float, patch #319 ==================== + +Fix __bfloat16 signalling NaN support on PowerPC. + +2025-10-31 Michael Meissner <[email protected]> + +libstdc++-v3/ + + * include/limits (__bfloat16 signaling_NaN): Use __builtin_nansf and + convert it to __bfloat16 instead of using __builtin_nansf16b. + ==================== Branch work223-float, patch #318 ==================== Use TARGET_FLOAT16_HW as a condition instead of TARGET_P9_VECTOR. diff --git a/libstdc++-v3/ChangeLog.meissner b/libstdc++-v3/ChangeLog.meissner index 0d82ea4ddd71..1e13edb48fc1 100644 --- a/libstdc++-v3/ChangeLog.meissner +++ b/libstdc++-v3/ChangeLog.meissner @@ -1,3 +1,14 @@ +==================== Branch work223-float, patch #319 ==================== + +Fix __bfloat16 signalling NaN support on PowerPC. + +2025-10-31 Michael Meissner <[email protected]> + +libstdc++-v3/ + + * include/limits (__bfloat16 signaling_NaN): Use __builtin_nansf and + convert it to __bfloat16 instead of using __builtin_nansf16b. + ==================== Branch work223, baseline ==================== 2025-10-20 Michael Meissner <[email protected]>
