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• • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vmul.vv to vmul.vx on GR2VR cost Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test cases for avg_floor vaadd implementation Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test cases for avg_floor vaadd implementation Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Reconcile the existing test for avg_floor Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Reconcile the existing test for avg_floor Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Avoid division by zero in check_builtin_call [PR120436]. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Avoid division by zero in check_builtin_call [PR120436]. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Leverage vaadd.vv for signed standard name avg_floor Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Leverage vaadd.vv for signed standard name avg_floor Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Add andi+bclr synthesis Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Add andi+bclr synthesis Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vxor.vv combine case 1 with GR2VR cost 0, 1 and 2 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vxor.vv combine case 1 with GR2VR cost 0, 1 and 2 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vxor.vv combine case 0 with GR2VR cost 0, 2 and 15 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vxor.vv combine case 0 with GR2VR cost 0, 2 and 15 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for signed vector SAT_ADD IMM form 1 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for signed vector SAT_ADD IMM form 1 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vxor.vv to vxor.vx on GR2VR cost Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vxor.vv to vxor.vx on GR2VR cost Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V:Add testcases for signed .SAT_ADD IMM form 1 with IMM = -1. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V:Add testcases for signed .SAT_ADD IMM form 1 with IMM = -1. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] shift+and+shift for logical and synthesis Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] shift+and+shift for logical and synthesis Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vor.vv combine case 1 with GR2VR cost 0, 1 and 2 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vor.vv combine case 1 with GR2VR cost 0, 1 and 2 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vor.vv combine case 0 with GR2VR cost 0, 2 and 15 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vor.vv combine case 0 with GR2VR cost 0, 2 and 15 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vor.vv to vor.vx on GR2VR cost Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vor.vv to vor.vx on GR2VR cost Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support CPUs in -march. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support CPUs in -march. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix some dynamic LMUL costing. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix some dynamic LMUL costing. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add autovec mode param. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add autovec mode param. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Clear both upper and lower bits using 3 shifts Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Clear both upper and lower bits using 3 shifts Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Default-initialize variable. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Default-initialize variable. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH][RISC-V][PR target/70557] Improve storing 0 to memory on rv32 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH][RISC-V][PR target/70557] Improve storing 0 to memory on rv32 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] testsuite: RISC-V: Update the cset-sext-sfb/zba-slliuw test optimization level. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] testsuite: RISC-V: Update the cset-sext-sfb/zba-slliuw test optimization level. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Clear high or low bits using shift pairs Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Clear high or low bits using shift pairs Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/120368] Fix 32bit shift on rv64 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/120368] Fix 32bit shift on rv64 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Improve (x << C1) + C2 split code Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Improve (x << C1) + C2 split code Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vand.vv combine case 1 with GR2VR cost 0, 1 and 2 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vand.vv combine case 1 with GR2VR cost 0, 1 and 2 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: RISC-V: Combine vec_duplicate + vand.vv to vand.vx on GR2VR cost Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: RISC-V: Combine vec_duplicate + vand.vv to vand.vx on GR2VR cost Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vand.vv combine case 0 with GR2VR cost 0, 2 and 15 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vand.vv combine case 0 with GR2VR cost 0, 2 and 15 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Infrastructure of synthesizing logical AND with constant Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Infrastructure of synthesizing logical AND with constant Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v2 1/2] The following changes enable P8700 processor for RISCV and P8700 is a high-performanc Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v2 1/2] The following changes enable P8700 processor for RISCV and P8700 is a high-performanc Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v2 2/2] MIPS p8700 doesn't have vector extension and added the dummies reservation for the sa Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v2 2/2] MIPS p8700 doesn't have vector extension and added the dummies reservation for the sa Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Avoid multiple assignments to output object Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Avoid multiple assignments to output object Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Tweak the asm check test of vx combine on GR2VR cost [NFC] Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Tweak the asm check test of vx combine on GR2VR cost [NFC] Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vrsub.vv combine case 1 with GR2VR cost 1 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vrsub.vv combine case 1 with GR2VR cost 1 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vrsub.vv combine case 1 with GR2VR cost 2 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vrsub.vv combine case 1 with GR2VR cost 2 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vrsub.vv combine case 1 with GR2VR cost 0 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vrsub.vv combine case 1 with GR2VR cost 0 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vrsub.vv combine case 0 with GR2VR cost 15 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vrsub.vv combine case 0 with GR2VR cost 15 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vrsub.vv combine case 0 with GR2VR cost 1 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vrsub.vv combine case 0 with GR2VR cost 1 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vrsub.vv combine case 0 with GR2VR cost 0 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vrsub.vv combine case 0 with GR2VR cost 0 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vrsub.vv to vrsub.vx on GR2VR cost Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vrsub.vv to vrsub.vx on GR2VR cost Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [committed][RISC-V][PR target/120333] Remove bogus bext pattern Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [committed][RISC-V][PR target/120333] Remove bogus bext pattern Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Fix false positive from Wuninitialized Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Fix false positive from Wuninitialized Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix the warning of temporary object dangling references. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix the warning of temporary object dangling references. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Rename conflicting variables in gen-riscv-ext-texi.cc Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Rename conflicting variables in gen-riscv-ext-texi.cc Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support Zilsd code gen Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support Zilsd code gen Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add new operand constraint: cR Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add new operand constraint: cR Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Fix ICE due to bogus use of gen_rtvec Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Fix ICE due to bogus use of gen_rtvec Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Avoid setting output object more than once in IOR/XOR synthesis Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Avoid setting output object more than once in IOR/XOR synthesis Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Since the loop increment i++ is unreachable, the loop body will never execute more than once Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Since the loop increment i++ is unreachable, the loop body will never execute more than once Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Avoid scalar unsigned SAT_ADD test data duplication Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Avoid scalar unsigned SAT_ADD test data duplication Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Partial cherry-pick of 4dd13988c93c24ba3605f4b9cafc97515c34f2ac, just the RISC-V backend bits. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Partial cherry-pick of 4dd13988c93c24ba3605f4b9cafc97515c34f2ac, just the RISC-V backend bits. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Make end_sequence return the insn sequence Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Make end_sequence return the insn sequence Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Reuse test name for vx combine test data [NFC] Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Reuse test name for vx combine test data [NFC] Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsub.vv combine case 1 with GR2VR cost 2 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsub.vv combine case 1 with GR2VR cost 2 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsub.vv combine case 1 with GR2VR cost 1 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsub.vv combine case 1 with GR2VR cost 1 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsub.vv combine case 1 with GR2VR cost 0 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsub.vv combine case 1 with GR2VR cost 0 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsub.vv combine case 0 with GR2VR cost 15 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsub.vv combine case 0 with GR2VR cost 15 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsub.vv combine case 0 with GR2VR cost 1 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsub.vv combine case 0 with GR2VR cost 1 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsub.vv combine case 0 with GR2VR cost 0 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsub.vv combine case 0 with GR2VR cost 0 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Adjust vx combine test case to avoid name conflict Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Adjust vx combine test case to avoid name conflict Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Rename vx_vadd-* testcase to vx-* for all vx combine [NFC] Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Rename vx_vadd-* testcase to vx-* for all vx combine [NFC] Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/120223] Don't use bset/binv for XTHEADBS Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/120223] Don't use bset/binv for XTHEADBS Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vsub.vv to vsub.vx on GR2VR cost Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vsub.vv to vsub.vx on GR2VR cost Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Regen riscv-ext.opt.urls Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Regen riscv-ext.opt.urls Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add augmented hypervisor series extensions. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add augmented hypervisor series extensions. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix uninit riscv_subset_list::m_allow_adding_dup issue Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix uninit riscv_subset_list::m_allow_adding_dup issue Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Drop duplicate build rule for riscv-ext.opt [NFC] Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Drop duplicate build rule for riscv-ext.opt [NFC] Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Drop riscv_ext_flag_table in favor of riscv_ext_info_t data Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Drop riscv_ext_flag_table in favor of riscv_ext_info_t data Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Drop riscv_ext_version_table in favor of riscv_ext_info_t data Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Drop riscv_ext_version_table in favor of riscv_ext_info_t data Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Drop riscv_implied_info and riscv_combine_info in favor of riscv_ext_info_t data Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Drop riscv_implied_info and riscv_combine_info in favor of riscv_ext_info_t data Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Introduce riscv_ext_info_t to hold extension metadata Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Introduce riscv_ext_info_t to hold extension metadata Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Adjust riscv_can_inline_p Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Adjust riscv_can_inline_p Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Use riscv-ext.def to generate target options and variables Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Use riscv-ext.def to generate target options and variables Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Generate extension table in documentation from riscv-ext.def Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Generate extension table in documentation from riscv-ext.def Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Introduce riscv-ext*.def to define extensions Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Introduce riscv-ext*.def to define extensions Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for scalar unsigned integer SAT_ADD form 7 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for scalar unsigned integer SAT_ADD form 7 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for vector unsigned integer SAT_ADD form 7 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for vector unsigned integer SAT_ADD form 7 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Minimal support for ssnpm, smnpm and smmpm extensions. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Minimal support for ssnpm, smnpm and smmpm extensions. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support for zilsd and zclsd extensions. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support for zilsd and zclsd extensions. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] testsuite: Fix RISC-V arch-52.c format issue. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] testsuite: Fix RISC-V arch-52.c format issue. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support RISC-V Profiles 23. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support RISC-V Profiles 23. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support RISC-V Profiles 20/22. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support RISC-V Profiles 20/22. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [V2][RISC-V] Synthesize more efficient IOR/XOR sequences Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [V2][RISC-V] Synthesize more efficient IOR/XOR sequences Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for vec_duplicate + vadd.vv combine case 1 with GR2VR cost 2 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for vec_duplicate + vadd.vv combine case 1 with GR2VR cost 2 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/120137][PR target/120154] Don't create out-of-range permutation constants Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/120137][PR target/120154] Don't create out-of-range permutation constants Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for vec_duplicate + vadd.vv combine case 1 with GR2VR cost 1 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for vec_duplicate + vadd.vv combine case 1 with GR2VR cost 1 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v2] RISC-V: Use vclmul for CRC expansion if available Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v2] RISC-V: Use vclmul for CRC expansion if available Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add new option --param=gpr2vr-cost= for rvv insn Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add new option --param=gpr2vr-cost= for rvv insn Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for vec_duplicate + vadd.vv combine case 1 with GR2VR cost 0 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for vec_duplicate + vadd.vv combine case 1 with GR2VR cost 0 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Rename VX_BINARY test helper to VX_BINARY_CASE_0 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Rename VX_BINARY test helper to VX_BINARY_CASE_0 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Apply clang-format to genrvv-type-indexer.cc [NFC] Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Apply clang-format to genrvv-type-indexer.cc [NFC] Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Implment H modifier for printing the next register name Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Implment H modifier for printing the next register name Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Avoid unnecessary andi with -1 argument Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Avoid unnecessary andi with -1 argument Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Separate the test running of rvv vx_vf Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Separate the test running of rvv vx_vf Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [to-be-committed][RISC-V] Adjust testcases and finish register move costing fix Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [to-be-committed][RISC-V] Adjust testcases and finish register move costing fix Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Minimal support for sdtrig and ssstrict extensions. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Minimal support for sdtrig and ssstrict extensions. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Minimal support for zama16b extension. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Minimal support for zama16b extension. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Recognized svadu and svade extension Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Recognized svadu and svade extension Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix missing implied Zicsr from Zve32x Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix missing implied Zicsr from Zve32x Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR middle-end/114512] Recognize more bext idioms for RISC-V Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR middle-end/114512] Recognize more bext idioms for RISC-V Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for vec_duplicate + vadd.vv combine when GR2VR cost 15 Jeff Law via Gcc-cvs

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