Hi,
This patch is the first part fixing memset-inline-{4,5,6,8,9}.c failures on
cortex-a9. GCC/arm doesn't generate any tuning information in assembly, it
can't tell whether we are compiling for cortex-a9 tune if the compiler is
configured so by default.
This patch introduces a new (target dependent) option "-mprint-tune-info".
It prints CPU tuning information as comment in assembler file, thus DEJAGNU
can check it and make decisions. By default the option is disabled, so it
won't change current behaviors. For now, pointers in tune structure are not
printed, we should improve that and output more useful information in the
long run.
Another patch is followed adding DEJAGNU test function and adapting test
strings.
Build and test on arm-none-eabi, is it OK?
2015-03-06 Bin Cheng <bin.ch...@arm.com>
* config/arm/arm.opt (print_tune_info): New option.
* config/arm/arm.c (arm_print_tune_info): New function.
(arm_file_start): Call arm_print_tune_info.
* config/arm/arm-protos.h (struct tune_params): Add comment.
* doc/invoke.texi (@item -mprint-tune-info): New item.
(-mtune): mention it in ARM Option Summary.Index: gcc/doc/invoke.texi
===================================================================
--- gcc/doc/invoke.texi (revision 221098)
+++ gcc/doc/invoke.texi (working copy)
@@ -540,6 +540,7 @@ Objective-C and Objective-C++ Dialects}.
-mfp16-format=@var{name}
-mthumb-interwork -mno-thumb-interwork @gol
-mcpu=@var{name} -march=@var{name} -mfpu=@var{name} @gol
+-mtune=@var{name} -mprint-tune-info @gol
-mstructure-size-boundary=@var{n} @gol
-mabort-on-noreturn @gol
-mlong-calls -mno-long-calls @gol
@@ -13295,6 +13296,13 @@ should be considered deprecated.
Restricts generation of IT blocks to conform to the rules of ARMv8.
IT blocks can only contain a single 16-bit instruction from a select
set of instructions. This option is on by default for ARMv8 Thumb mode.
+
+@item -mprint-tune-info
+@opindex mprint-tune-info
+Print CPU tuning information as comment in assembler file. This is
+an option used only for regression testing of the compiler and not
+intended for ordinary use in compiling code. This option is disabled
+by default.
@end table
@node AVR Options
Index: gcc/config/arm/arm.c
===================================================================
--- gcc/config/arm/arm.c (revision 221098)
+++ gcc/config/arm/arm.c (working copy)
@@ -25638,6 +25638,59 @@ arm_emit_eabi_attribute (const char *name, int num
asm_fprintf (asm_out_file, "\n");
}
+/* This function is used to print CPU tuning information as comment
+ in assembler file. Pointers are not printed for now. */
+
+void
+arm_print_tune_info (void)
+{
+ asm_fprintf (asm_out_file, "\t@.tune parameters\n");
+ asm_fprintf (asm_out_file, "\t\t@constant_limit:\t%d\n",
+ current_tune->constant_limit);
+ asm_fprintf (asm_out_file, "\t\t@max_insns_skipped:\t%d\n",
+ current_tune->max_insns_skipped);
+ asm_fprintf (asm_out_file, "\t\t@num_prefetch_slots:\t%d\n",
+ current_tune->num_prefetch_slots);
+ asm_fprintf (asm_out_file, "\t\t@l1_cache_size:\t%d\n",
+ current_tune->l1_cache_size);
+ asm_fprintf (asm_out_file, "\t\t@l1_cache_line_size:\t%d\n",
+ current_tune->l1_cache_line_size);
+ asm_fprintf (asm_out_file, "\t\t@prefer_constant_pool:\t%d\n",
+ (int) current_tune->prefer_constant_pool);
+ asm_fprintf (asm_out_file, "\t\t@branch_cost:\t(s:speed, p:predictable)\n");
+ asm_fprintf (asm_out_file, "\t\t\t\ts&p\tcost\n");
+ asm_fprintf (asm_out_file, "\t\t\t\t00\t%d\n",
+ current_tune->branch_cost (false, false));
+ asm_fprintf (asm_out_file, "\t\t\t\t01\t%d\n",
+ current_tune->branch_cost (false, true));
+ asm_fprintf (asm_out_file, "\t\t\t\t10\t%d\n",
+ current_tune->branch_cost (true, false));
+ asm_fprintf (asm_out_file, "\t\t\t\t11\t%d\n",
+ current_tune->branch_cost (true, true));
+ asm_fprintf (asm_out_file, "\t\t@prefer_ldrd_strd:\t%d\n",
+ (int) current_tune->prefer_ldrd_strd);
+ asm_fprintf (asm_out_file, "\t\t@logical_op_non_short_circuit:\t[%d,%d]\n",
+ (int) current_tune->logical_op_non_short_circuit[0],
+ (int) current_tune->logical_op_non_short_circuit[1]);
+ asm_fprintf (asm_out_file, "\t\t@prefer_neon_for_64bits:\t%d\n",
+ (int) current_tune->prefer_neon_for_64bits);
+ asm_fprintf (asm_out_file,
+ "\t\t@disparage_flag_setting_t16_encodings:\t%d\n",
+ (int) current_tune->disparage_flag_setting_t16_encodings);
+ asm_fprintf (asm_out_file,
+ "\t\t@disparage_partial_flag_setting_t16_encodings:\t%d\n",
+ (int) current_tune
+ ->disparage_partial_flag_setting_t16_encodings);
+ asm_fprintf (asm_out_file, "\t\t@string_ops_prefer_neon:\t%d\n",
+ (int) current_tune->string_ops_prefer_neon);
+ asm_fprintf (asm_out_file, "\t\t@max_insns_inline_memset:\t%d\n",
+ current_tune->max_insns_inline_memset);
+ asm_fprintf (asm_out_file, "\t\t@fuseable_ops:\t%u\n",
+ current_tune->fuseable_ops);
+ asm_fprintf (asm_out_file, "\t\t@sched_autopref:\t%d\n",
+ (int) current_tune->sched_autopref);
+}
+
static void
arm_file_start (void)
{
@@ -25689,6 +25742,9 @@ arm_file_start (void)
asm_fprintf (asm_out_file, "\t.cpu %s\n", truncated_name);
}
+ if (print_tune_info)
+ arm_print_tune_info ();
+
if (TARGET_SOFT_FLOAT)
{
fpu_name = "softvfp";
Index: gcc/config/arm/arm-protos.h
===================================================================
--- gcc/config/arm/arm-protos.h (revision 221098)
+++ gcc/config/arm/arm-protos.h (working copy)
@@ -264,6 +264,9 @@ enum arm_sched_autopref
ARM_SCHED_AUTOPREF_FULL
};
+/* Dump function ARM_PRINT_TUNE_INFO should be updated whenever this
+ structure is modified. */
+
struct tune_params
{
bool (*rtx_costs) (rtx, RTX_CODE, RTX_CODE, int *, bool);
Index: gcc/config/arm/arm.opt
===================================================================
--- gcc/config/arm/arm.opt (revision 221098)
+++ gcc/config/arm/arm.opt (working copy)
@@ -222,6 +222,12 @@ mtune=
Target RejectNegative ToLower Joined Enum(processor_type) Var(arm_tune_option)
Init(arm_none)
Tune code for the given processor
+mprint-tune-info
+Target Report RejectNegative Var(print_tune_info) Init(0)
+Print CPU tuning information as comment in assembler file. This is
+an option used only for regression testing of the compiler and not
+intended for ordinary use in compiling code.
+
; Other processor_type values are loaded from arm-tables.opt
; but that is a generated file and this is an odd-one-out.
EnumValue
