On 07/27/2011 06:21 AM, Georg-Johann Lay wrote:
> +(define_insn_and_split "*mulsi3"
> + [(set (match_operand:SI 0 "pseudo_register_operand"
> "=r")
> + (mult:SI (match_operand:SI 1 "pseudo_register_operand"
> "r")
> + (match_operand:SI 2 "pseudo_register_or_const_int_operand"
> "rn")))
> + (clobber (reg:DI 18))]
> + "AVR_HAVE_MUL && !reload_completed"
> + { gcc_unreachable(); }
> + "&& 1"
> + [(set (reg:SI 18)
> + (match_dup 1))
That seems like it's guaranteed to force an unnecessary move.
Have you tried defining special-purpose register classes to
force reload to move the data into the right hard regs?
E.g. "Y" prefix
"QHS" size
two digit starting register number, as needed.
You'll probably end up with quite a few register classes
out of this, but hopefully reload can do a better job than
you can manually...
r~
