Hi Marcus,
Thanks for the review and comments.
>> OK and can you back port to 5 ?
Please find attached the backported patch on gcc-5-branch.
Regression tested on AArch64 without any issues.
2015-09-28 Andrew Pinski <apin...@cavium.com>
ChangeLog
* config/aarch64/aarch64.md (prefetch):
Change the predicate of operand 0 to register_operand.
Thanks,
Naveen
Index: config/aarch64/aarch64.md
===================================================================
--- config/aarch64/aarch64.md (revision 228182)
+++ config/aarch64/aarch64.md (working copy)
@@ -382,7 +382,7 @@
)
(define_insn "prefetch"
- [(prefetch (match_operand:DI 0 "address_operand" "r")
+ [(prefetch (match_operand:DI 0 "register_operand" "r")
(match_operand:QI 1 "const_int_operand" "")
(match_operand:QI 2 "const_int_operand" ""))]
""
