Hi all, As mentioned in https://gcc.gnu.org/ml/gcc-patches/2016-05/msg00297.html, frename-registers registers can be beneficial for aarch64 and the patch at https://gcc.gnu.org/ml/gcc-patches/2016-05/msg01618.html resolves the AESE/AESMC fusion issue that it exposed in the aarch64 backend. So this patch enables the pass for aarch64 at -O2 and above.
Bootstrapped and tested on aarch64-none-linux-gnu. Ok for trunk? Thanks, Kyrill P.S. Why is the table holding this information called aarch_option_optimization_table rather than aarch64_option_optimization_table ? 2016-05-27 Kyrylo Tkachov <kyrylo.tkac...@arm.com> * common/config/aarch64/aarch64-common.c (aarch64_option_optimization_table): Enable -frename-registers at -O2 and higher.
diff --git a/gcc/common/config/aarch64/aarch64-common.c b/gcc/common/config/aarch64/aarch64-common.c index 08e795934207d015d9fa22c3822930af4a21c93a..91801df731471f1842802370497e498fda62098a 100644 --- a/gcc/common/config/aarch64/aarch64-common.c +++ b/gcc/common/config/aarch64/aarch64-common.c @@ -50,6 +50,8 @@ static const struct default_options aarch_option_optimization_table[] = { OPT_LEVELS_1_PLUS, OPT_fsched_pressure, NULL, 1 }, /* Enable redundant extension instructions removal at -O2 and higher. */ { OPT_LEVELS_2_PLUS, OPT_free, NULL, 1 }, + /* Enable the register renaming pass at -O2 and higher. */ + { OPT_LEVELS_2_PLUS, OPT_frename_registers, NULL, 1 }, { OPT_LEVELS_NONE, 0, NULL, 0 } };